B. E (EEE)
M. E (CSE)
Ph. D. (CSE)
(a). International Journals
1. M.Brindha and N.Ammasai Gounden,”A chaos based image encryption and lossless compression algorithm using hash table and Chinese Remainder Theorem “, Applied Soft Computing (Elsevier) , Vol. 40, pp. 379-390, 2016 (SCI – 1568 – 4946).
2. M.Brindha and N.Ammasai Gounden,”Image encryption scheme based on block-based confusion and multiple levels of diffusion”, IET Computer Vision, Vol. 10, Issue. 6, pp 593 – 602, 2016 (SCI - 1751-9632).
3. M.Brindha, N. Ammasai Gounden. and M. Sriram. “A hybrid image encryption algorithm using chaos and conway's game-of-life cellular automata”, Security and Communication Networks (Wiley), Vol. 9, No. 7, pp. 634 – 651, 2015 (DOI - 10.1002/sec.1352).
4. S. Subash Dangol, S.Selvakumar and M.Brindha , " Genuine ARP(GARP) - A Broadcast based Stateful Authentication Protocol ", ACM. Sigsoft Software Engineering Notes, Vol.36, no.4, PP.1-10, July 2011.
(b). National & International Conferences
1. M. Brindha, C. Annadurai, “A new dynamic finite state vector Quantization algorithm for image compression” in the National Conference on “High Performance Computing Vision’06” by GCE, Tirunelveli on Apr 5th 2006.
2. M. Brindha, C. Annadurai, “A new dynamic finite state vector Quantization algorithm for image compression” in the National Conference on “Emerging Technologies in Electronics Systems (ETES’06)” by Noorul Islam College of Engineering, Kumara coil on Apr 29th 2006.
3. M. Brindha, “Periodicity Analysis of Arnold cat map and its application to image encryption” in the International Conference on Inventive Computing and Informatics (ICICI 2017), IEEE Publishers (accepted for publication).
4. M. Brindha, “Multiple stage image encryption using chaotic logistic map” in the International Conference on Intelligent Sustainable Systems (ICISS 2017), IEEE Publishers (accepted for publication).
5. M. DeviPriya, M. Brindha, “A Real Time Image Encryption based on chaos” in the International Conference on Inventive Computing and Informatics (ICICI 2017), IEEE Publishers (accepted for publication).
6. M. DeviPriya, M. Brindha, “Moving Object Tracking using FPGA” in the International Conference on Intelligent Sustainable Systems (ICISS 2017), IEEE Publishers (accepted for publication).
7. M. Brindha, “Digital camera with real time chaotic image encryption” in the International Conference on Intelligent Sustainable Systems (ICISS 2017), IEEE Publishers (accepted for publication).
8. M. Brindha, “Confidentiality, Integrity and authentication of DICOM medical images” in the 2nd International Conference on Inventive Systems and Control (ICISC 2018), IEEE Publishers (accepted for publication).
9. R. Vidhya, M. Brindha, “Recursively seeded image encryption algorithm" in the ICoAC 2017 organised by MIT, Chennai (accepted for publication).
(c). Workshop
1. M.Brindha, S. Selvakumar “Link layer jamming attacks in wireless sensor networks- A survey” in the workshop conducted by Anna university, Chennai under CDBR-SSE project on Dec 21tst 2007.
2. R. Vidhya, M. Brindha, “A novel dynamic Key based chaotic image encryption” in the National workshop on cryptology (NWC) 2017 organised by NIT, Trichy.
Life Member in Computer Society of India
S. No. |
Roll No. |
Name |
Month& Year of Joining |
1. |
406116003 |
R. Vidhya |
July 2016 |
2. |
406116008 |
M. Devi Priya |
July 2017 |
Sl.No |
Name of the Organization |
Title of the Project |
Date of Sanction |
Duration |
Amount (in Lakhs) |
1. |
DST |
Design and development of ICT-enabled cloud based mobile application for the self-promotion of products developed by self-help groups |
1/11/2017 |
2 years |
27.2 |
2. |
Ministry of Coal, Government of India |
Electronification of Ground Water Control and Conveyor Systems in Mines |
14/7/2017 |
18 months |
179.53 |
(a). Image Encryption Laboratory
FPGA Image processing/encryption kit
• FPGA based reconfigurable input and output device with a Processor Speed of 667MHz
• Having Memory of 256 MB
• Connects to a host computer over USB and wireless 802.11b,g,n
• USB Camera with support USB Video Device Class (UVC) protocol
• Acquisition of image with resolution up to 1280 x 720
FPGA Real time image processing/encryption kit
• Smart camera having the maximum resolution of 640x480, frame rate of 60fpgs
• 8.5mm compact fixed focal length and inbuilt 1.6GHz processor, 512MB RAM & storage of 2GB
• Necessary power & I/O accessories, power supply
• M12 to DSUB cable for Power I/O accessory, M12 to RJ45 cable, and M12 to VGA / USB cable
• Support communications protocols such as EtherNet I/P, Modbus, and TCP I/P
(b). DST Sponsored “Mobile application Development Lab” for SHGs
(a). Institute Level
(b). Department Level
Assistant Professor
Department of Computer Science and Engineering
National Institute of Technology, Tiruchirappalli-620015
Tamil Nadu Email: brindham@nitt.edu
Telephone: 0431-2503218