CS301
COMPUTER ARCHITECTURE
Objectives
- To understand the concept of advanced pipelining techniques
- To understand the current state of art in memory system design
- To know the working principle of I/O devices
Outcomes
- Ability to apply performance metrics to find the performance of systems
- Ability to identify the problems in components of computer
- Ability to comprehend and differentiate various computer architectures and hardware
Unit – I
Introduction, Classes of computers, Defining Computer Architecture – Trends in Technology – Trends in Power and Energy in Integrated Circuits – Trends in Cost – Dependability – Measuring, Reporting and Summarizing Performance – Quantitative Principles of Computer Design.
Unit – II
Basic and Intermediate pipelining Concepts, The Major Hurdle of Pipelining – Pipeline Hazards, Pipelining Implementation, Implementation issues that makes Pipelining hard, Extending the MIPS Pipeline to Handle Multicycle Operations, The MIPS R4000 Pipeline.
Unit – III
Instruction-Level Parallelism: Concepts and Challenges – Basic Compiler Techniques for Exposing ILP – Reducing Branch Costs with Prediction – Overcoming Data Hazards with Dynamic Scheduling – Dynamic Scheduling – Hardware-Based Speculation – Exploiting ILP Using Multiple Issue and Static Scheduling – Exploiting ILP, Advanced Techniques for Instruction Delivery and Speculation, Studies of the Limitations of ILP
Unit – IV
Vector Architecture – SIMD Instruction Set Extensions for Multimedia – Graphics Processing Units – Detecting and Enhancing Loop-Level Parallelism – Centralized Shared-Memory Architectures – Performance of Shared-Memory Multiprocessors – Distributed Shared Memory, Models of Memory Consistency, Multicore Processors and Their Performance.
Unit – V
Review of Memory Hierarchy Design, Cache Performance, Basic Cache Optimizations, Virtual Memory, Protection and Examples of Virtual Memory, Advanced Optimizations of Cache Performance, Memory Technology and Optimizations, Protection: Virtual Memory and Virtual Machines, Crosscutting Issues: The Design of Memory Hierarchies. Case Studies / Lab Exercises.
TEXT BOOKS
- David. A. Patterson and John L. Hennessy, "Computer Architecture: A Quantitative approach", Elsevier, 5th Edition, 2012
REFERENCE
- K. Hwang and Naresh Jotwani, “Advanced Computer Architecture, Parallelism, Scalability, Programmability”, Tata McGraw Hill, 2nd Edition, 2010