| S.No. | Name of the scholar | Area of Research | Status |
|---|---|---|---|
| 1. | T.N.Prabakar | Design and analysis of schemes for the implementation of Asynchronous pipelined circuits on FPGA. | Completed |
| 2. | M.Santhi | Design and analysis of highperformance MB-OFDM UWB Wireless System using Asynchronous Techniques. | Completed |
| 3. | C.Vennila | Design of reconfigurable architectures for baseband processing in wireless communication systems. | Completed |
| 4. | K.Swaminathan | Design of an efficient, reliable interconnect fabric for Network on Chip. | Completed |
| 5. | K.Nitish Kumar | Design of Reconfigurable Spectrum sensing architecture for Cognitive radio and filter realization at the gate level | Completed |
| 6. | X.Antony Xavier Glittas | Design of FFT architecture for VLSI Signal processing | Completed |
| 7. | R.Marshal | Digital Design in Quantum Cellular Automation | Completed |
| 8. | S.Geethu | Design and implementation of low-complexity Mult standard Wireless Receivers. | Completed |
| 9. | J.Sujanth Roy | Design of Decoding Architecture | Completed |
| 10. | K. Raja Sekar | Digital VLSI Architecture for Cryptosystem | Completed |
| 11. | Anantharaj.T.V | RELIABLE AND EFFICIENT ADDER AND SUBTRACTOR DESIGNS IN QUANTUM-DOT CELLULAR AUTOMATA (QCA) | Completed |
| 12. | S.Bibin Sam Paul | Design and implementation of prime factor FFT for Wireless LTE applications. | Completed |
| 13. | G.Sushma | Digital VLSI Architecture Design | Completed |
| 14. | A.Aravindhan | NOC Architecture | Completed |
| 15. | Uma Maheswaran | Digital VLSI | Completed |
| 16. | Kadar A A | VLSI Circuit Design | Ongoing |
| 17. | K. Ranjit Kannan | VLSI Design | Ongoing |
| 18. | Manivannan T S | Ambipolar Current Suppression Techniques for Drain Elevated Tunnel Field Effect Transistor. | Completed |
| 19. | R.Parameshwaran | An Optimized VLSI-Based High-Performance Architecture for Lossless Data Compression. | Completed |
| 20. | Muhammad Raees PC | FPGA | Ongoing |
| 21. | D.Mohan Reddy | Design and Development of a Self-reconfigurable system using Neuromorphic computing. | Ongoing |
| 22. | P.Sudha | Digital VLSI | Ongoing |
