Ph.D. Electrical Engineering Department, Indian Institute of Technology Patna (2018-2023)
M.Tech. Microelectronics & VLSI of Electronics and Communication Engineering, NIT Durgapur (2012-2014)
B.Tech. Electronics and Communication Engineering, Affiliated to Jawaharlal Nehru Technological University Kakinada (2008-2012)
(12/2025 to present) -> Assistant Professor, NIT-Tiruchirappalli, Tamilnadu
(08/2023 to 12/2025) -> Assistant Professor, VIT Vellore
(06/2015 to 12/2017) -> Assistant Professor, Vignan Institute of Information Technology, Vizag
| S. No. | Author(s) | Title of Paper | Journal | Volume (No.) | Year | Impact Factor |
|---|---|---|---|---|---|---|
| 1 | A. Maniyar, S. Das, P.S.T.N. Srinivas, P. K. Tiwari | Geometry-Driven Thermal Noise Trends in GAA Nanowire Devices | Silicon | Early Access | 2026 | 3.3 |
| 2 | B. V. Rao, A. Kumar, P.S.T.N. Srinivas, B. Bhowmick | Dielectric Modulation-Based High-Sensitivity Biomolecular Detection Using Ge/Si Heterostructure ES Fin-TFET Biosensors: A Detailed Performance Study | Sensing and Imaging | 27 (1) | 2026 | 2.0 |
| 3 | R. Raj, S. Moparthi, A. Kumar, P. K. Tiwari, P.S.T.N. Srinivas | Computational investigation of trapezoidal channel profiles in Gate-All-Around (GAA) FETs for digital performance | Micro and Nanostructures | 211 | 2025 | 3.0 |
| 4 | S. Kumar, A. Kumar, P.S.T.N. Srinivas | Investigation of BTBT-Triggered Split-Gate Junctionless Nanosheet FETs for Analog and RF Applications | Transactions on Electrical and Electronic Materials | 26 | 2025 | 1.9 |
| 5 | A. Maniyar, P. Raj, P.S.T.N. Srinivas, A. Kumar, K. S. Chang-Liao, P. K. Tiwari | Impact of Process-Induced Inclined Side-Walls on Gate Leakage Current of Nanowire GAA MOSFETs | IEEE Transactions on Electron Devices | 71 (3) | 2024 | 3.2 |
| 6 | T. S. Kumar, A. Hazarika, P.S.T.N. Srinivas, P. K. Tiwari, A. Kumar | A machine learning approach to accelerate reliability prediction in nanowire FETs from self-heating perspective | Microelectronics Reliability | 161 | 2024 | 1.9 |
| 7 | P.S.T.N. Srinivas, N. A. Kumari, A. Kumar, P. K. Tiwari, K. G. Sravani | Impact of ambient temperature on CombFET for sub-5-nm technology nodes: An RF performance perspective | Microsystem Technologies | 31 (4) | 2024 | 1.8 |
| 8 | S. S. Katta, T. Kumari, P.S.T.N. Srinivas, P. K. Tiwari | Logic-in-memory application of silicon nanotube-based FBFET with core-source architecture | Microelectronics Journal | 146 | 2024 | 2.3 |
| 9 | P.S.T.N. Srinivas, S. Jit, P. K. Tiwari | Impact of self-heating on thermal noise in In1−xGaxAs GAA MOSFETs | Microelectronics Journal | 131 | 2023 | 2.3 |
| 10 | A. Maniyar, P.S.T.N. Srinivas, P. K. Tiwari, K. S. Chang-Liao | Impact of process-induced inclined sidewalls on gate-induced drain leakage (GIDL) current of nanowire GAA MOSFETs | IEEE Transactions on Electron Devices | 69 (9) | 2022 | 3.2 |
| 11 | S. Singh, P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Physical insight into self-heating induced performance degradation in RingFET | Silicon | 14 (13) | 2022 | 3.3 |
| 12 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Effect of self-heating on small-signal parameters of In0.53Ga0.47As based gate-all-around MOSFETs | Semiconductor Science and Technology | 36 | 2021 | 2.1 |
| 13 | P.S.T.N. Srinivas, P. K. Tiwari | Impact of Self-Heating on Linearity Performance of In0.53Ga0.47As-Based Gate-All-Around MOSFETs | IEEE Transactions on Device and Materials Reliability | 22 (1) | 2021 | 2.3 |
| 14 | V. K. Dixit, R. Gupta, P.S.T.N. Srinivas, S. Dubey | Back Bias Induced Modeling of Subthreshold Characteristics of SOI Junctionless Field Effect Transistor (JLFET) | Silicon | 13 (6) | 2021 | 3.3 |
| 15 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Threshold Voltage Modeling of tri-Gate Schottky-Barrier (TGSB) Field-Effect-Transistors (FETs) | Silicon | 13 | 2021 | 3.3 |
| 16 | V. K. Dixit, R. Gupta, V. Purwar, P.S.T.N. Srinivas | Effect of Substrate Induced Surface Potential (SISP) on Threshold Voltage of SOI Junction-Less Field Effect Transistor (JLFET) | Silicon | 12 (4) | 2021 | 3.3 |
| 17 | D. Gola, B. Singh, P.S.T.N. Srinivas, P. K. Tiwari | Thermal noise models for trigate junctionless transistors including substrate bias effects | IEEE Transactions on Electron Devices | 67 (1) | 2020 | 3.2 |
| 18 | P.S.T.N. Srinivas, A. Kumar, S. Jit, P. K. Tiwari | Self-heating effects and hot carrier degradation in In0.53Ga0.47As gate-all-around MOSFETs | Semiconductor Science and Technology | 35 | 2020 | 2.1 |
| 19 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | An insight into self-heating effects and its implications on hot carrier degradation for silicon-nanotube-based double gate-all-around (DGAA) MOSFETs | IEEE Journal of the Electron Devices Society | 7 | 2019 | 2.3 |
| S. No. | Author(s) | Title of Abstract/ Paper | Title of the Proceedings | Year | DOI / Link |
|---|---|---|---|---|---|
| 1 | A. Maniyar, P.S.T.N. Srinivas, P. K. Tiwari | Impact of Process-Induced Inclined Sidewalls On Small Signal Parameters of Silicon Nanowire GAA MOSFET | TENCON 2023 - 2023 IEEE Region 10 Conference (TENCON) | 2023 | 10322347 |
| 2 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | In0.53Ga0.47As Nanosheet MOSFETs with Self-Heating Effects | 2022 IEEE Silchar Subsection Conference (SILCON) | 2022 | 10028932 |
| 3 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Analytical Modeling of Subthreshold Current and Subthreshold Swing of Schottky-Barrier Source/Drain Double Gate-All-Around (DGAA) MOSFETs | 2019 IEEE International Symposium on Smart Electronic Systems (iSES) | 2019 | 9002480 |
| 4 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Compact drain current model of silicon-nanotube based double gate-all-around (DGAA) MOSFETs incorporating short channel effects | 2019 IEEE 14th Nanotechnology Materials and Devices Conference (NMDC) | 2019 | 9084000 |
| 5 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Effects of Lateral Spreading in 2-Dimensional Non-Uniform Doped Junctionless FinFETs | 2019 IEEE 9th International Nanoelectronics Conferences (INEC) | 2019 | 8853855 |
| 6 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Physical insight into self-heating effects in ultrathin junctionless gate-all-around FETs | 2019 IEEE 9th International Nanoelectronics Conferences (INEC) | 2019 | 8853852 |
| 7 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Analytical Threshold Voltage Model of Schottky-source/drain (Schottky-S/D) double gate-all-around (DGAA) Field-Effect-Transistors (FETs) | 2019 Devices for Integrated Circuit (DevIC) | 2019 | 8783617 |
| 8 | P.S.T.N. Srinivas, V. K. Pulluri, C. Kumar, A. K. Mal | Implementation of 32 nm FinFET voltage controlled oscillator | International Conference for Convergence for Technology-2014 | 2014 | 7092337 |
| 9 | P. Dhilleswararao, R. Mahapatra, P.S.T.N. Srinivas | High SNM 32nm CNFET based 6T SRAM Cell design considering transistor ratio | 2014 International Conference on Electronics and Communication Systems (ICECS) | 2014 | 6892748 |
