Publications

a)      International Journals

  1. Thilagavathy R, Venkataramani B, “A Novel ECG Signal Compression using Wavelet and Discrete Anamorphic Stretch Transforms”, Biomedical Signal Processing and Control (Elsevier), Volume 71, Part B, January 2022, 102773. org/10.1016/j.bspc.2021.102773. 
  2. Thilagavathy R, Venkataramani B, “Optimization of Discrete Anamorphic Stretch Transform and Phase Recovery Techniques for ECG Signal Compression”, IETE Journal of Research (Taylor & Francis) – doi.org/10.1080/03772063.2021.2012281
  3. Thilagavathy R, Venkataramani B, “A novel feature enhancement technique for ECG Arrhythmia Classification using Discrete Anamorphic Stretch Transform”, Circuits, Systems and Signal Processing (Springer), 2022. doi.org/10.1007/s00034-022-02120-5

b)      International Conferences

  1. Palanisamy, R.Thilagavathy, M.Ratheesh Kumar and A.Srihari, “Efficient realization of CORDIC based LDPC Decoder for WiMAX System”, IEEE- International Conference on Signal Processing, Communications and Networking Madras Institute of Technology, Ann University, Chennai India, Jan 4-6, 2008. Pp 46-50. DOI: 10.1109/ICSCN.2008.4447158. EID: 2-s2.0-48149090053.
  2. Kirankumar, M.Bhaskar, R.Thilagavathy and B.Venkataramani, “Novel Low Power Multilevel Current Mode Interconnect System Ineffective to Supply voltage variations” International Conference on Optoelectronics and Communication Technology ICOICT2009, Trivandum, 26-27 February 2009.
  3. Gopikiran, R. Thilagavathy, “FPGA Implementation of Floating point Rotation Mode CORDIC Algorithm, International Conference on Signal Processing, Communication, Computing and Networking Technologies, ICSCCN-2011, Kumaracoil, 21-22 July 2011. DOI: 10.1109/ICSCCN.2011.6024604. EID: 2-s2.0-80053622447.
  4. Mohana Vidya, R. Thilagavathy, “Low Power, High Performance Current Mode Transceiver for Network-on- Chip Communication”, International Conference on Signal Processing, Communication, Computing and Networking Technologies, ICSCCN-2011, Kumaracoil, 21-22 July 2011. DOI: 10.1109/ICSCCN.2011.6024548. EID: 2-s2.0-80053636221.
  5. Gopikiran, R.Thilagavathy, P.Pavan Kumar, "FPGA Implementation of Floating - point CORDIC Arithmetic for SVD Computation", International Conference on Advanced Computing Methodologies, ICACM-2011, Hyderabad, 09- 10 December 2011.
  6. Manoj Sharma, R.Thilagavathy, “Performance Analysis of Advanced Encryption Standard for Low Power and Area Applications”, International Conference on Information and Communication Technologies, ICT-2013, Kumaracoil, 11-12 April 2013. DOI: 10.1109/CICT.2013.6558236. EID: 2-s2.0-84881645663.
  7. G. Digish, R. Thilagavathy, “ASIC Implementation of Physical Downlink Shared Channel for LTE”, International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT), Kumaracoil, 10-11 July 2014. DOI: 10.1109/ICCICCT.2014.6992989. EID: 2-s2.0-84921658502.
  8. Sandeep K, R Thilagavathy, “Performance Comparison of Physical Downlink Control Channel (PDCCH) for LTE employing QPSK and 16QAM as Modulation Schemes”, International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT), Kumaracoil, 10-11 July 2014. DOI: 1109/ICCICCT.2014.6993034. EID: 2-s2.0-84921649780
  9. Rahul, R. Thilagavathy, “A Low Phase Noise CMOS Voltage-Controlled Differential Ring Oscillator”, International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT), Kumaracoil, 10-11 July 2014. DOI: 10.1109/ICCICCT.2014.6993110. EID: 2-s2.0-84921666435.
  10. K Srikanth Babu, R. Thilagavathy, “Rapid Estimation of Circuit Performance”, 3rd International Conference on Computing, Communication and Sensor Network, CCSN14 organized by International Association of Science, Technology and Management, 12-14 December 2014.
  11. Thilagavathy R, Susmitha Settivari, Venkataramani B and Bhaskar M,” FPG Implementation of a Novel Area Efficient FFT Scheme using Mixed Radix FFT’ 21st International Symposium on VLSI Design and Test, 2017. DOI: 1007/978-981-10-7470-7_9.  EID: 2-s2.0-85039453472.  Part of ISSN: 18650929.
  12. Thilagavathy, B.Venkataramani, “ECG Signal Compression using Discrete Anamorphic Stretch Transform”, 5th International Conference on Microelectronics, Circuits & Systems, May, 19th- 20th, 2018 Organized by  Applied Computer Technology, Kolkata. ISBN: 81-85824-46-1
  13. Thilagavathy R, Srivatsan R, Sreekarun S, Sudeshna D, Lakshmi Priya P, Venkataramani B, “Real-Time ECG Signal Feature Extraction and Classification using Support Vector Machine”, International Conference on Contemporary Computing and Applications (IC3A), Feb 05-07, 2020. DOI: 1109/IC3A48958.2020.233266. EID: 2-s2.0-85084983723.
  14. S. Amirtha Varshini, Guguloth Bhavani, Vithya M, and R. Thilagavathy, “Real-time Hand Gesture Recognition for Robotic Arm and Home Automation. In 2021 International Symposium on Electrical, Electronics and Information Engineering (ISEEIE 2021), February 19–21, 2021, Seoul, Republic of Korea. ACM, New York, NY, USA, 6 pages. DOI: 10.1145/3459104.3459142. EID: 2-s2.0-85113225222
  15. Poorvi B, Yuvaraj S, Palanisamy P and Thilagavathy R, “ FPGA Implementation of Phase Recovery Technique for Complex Transforms”, IEEE, IEMTRONICS 2022 (International IOT, Electronics and Mechatronics Conference), 2022. DOI: 10.1109/IEMTRONICS55184.2022.9795837.
  16. Shatharajupally Vinaykumar and Thilagavathy R, “FPGA IMPLEMENTATION OF ARTIFICIAL NEURAL NETWORK (ANN) FOR ECG SIGNAL CLASSIFICATION”, IEEE, IEMTRONICS 2022 (International IOT, Electronics and Mechatronics Conference), 2022. DOI: 10.1109/IEMTRONICS55184.2022.9795755.
  17. Vaisnav A, Sandhya Ashok, Shatharajupally Vinaykumar, R. Thilagavathy, “FPGA Implementation and Comparison of Sigmoid and Hyperbolic Tangent Activation Functions in an Artificial Neural Network”, IEEE,  International Conference on Electrical, Computer and Energy Technologies (ICECET), 2022                                          DOI: 10.1109/ICECET55527.2022.9873085.

c)       National Conferences

  1. Raghavendra, R.Thilagavathy, “Asynchronous Reconfigurable CRC Circuit in Sense Amplifier – Based Pass Transistor Logic” 2nd National conference on Signal processing, Communications and VLSI Design, NCSCV’10 organized by Anna University Coimbatore, May 7-8, 2010.
  2. Zameeruddin P, R.Thilagavthy, “High Performance Low–Power Carry Look- ahead Adder”, 2nd National conference on Signal processing, Communications and VLSI Design, NCSCV’10 organized by Anna University Coimbatore, May 7-8, 2010.
  3. G Vidhya Sagar, R. Thilagavathy, “A Multi-Phase Delay Locked Loop with Bist Circuit for Fault Detection”, 2nd National conference on Signal processing, Communications and VLSI Design, NCSCV’10 organized by Anna University Coimbatore, May 7-8, 2010.