EC807

Advanced Computer Architecture 3-0- 0-3

COURSE OBJECTIVE

  • To   give   an   exposure   on   look   ahead   pipelining-   parallelism,   multiprocessor   scheduling, multithreading and various memory organizations.

COURSE CONTENT

Multiprocessors and multi-computers. Multi-vector and SIMD computers.   PRAM and VLSI Models. Conditions  of  parallelism.  Program partitioning  and  scheduling.    Program flow  mechanisms.    Parallel processing applications. Speed up performance law.

Advanced processor technology. Superscalar and vector processors. Memory hierarchy technology. Virtual memory technology. Cache memory organization. Shared memory organization.

Linear pipeline processors. Non linear pipeline processors. Instruction pipeline design. Arithmetic design. Superscalar and super pipeline design. Multiprocessor system interconnects. Message passing mechanisms.

Vector Processing principle. Multivector multiprocessors. .Compound Vector processing. Principles of multithreading. Fine grain multicomputer. Scalable and multithread architectures.   Dataflow and hybrid architectures.

Parallel programming models. Parallel languages and compilers. Parallel programming environments. Synchronization and multiprocessing modes. Message passing program development. Mapping programs onto multicomputer. Multiprocessor UNIX design goals. MACH/OS kernel architecture. OSF/1 architecture and applications.

 

Text Books

1.   K. Hwang,  “Advanced Computer Architecture “ , Tata McGraw Hill, 2001.

2.   W. Stallings,” Computer Organization and Architecture”, McMillan, 1990 .

 

Reference Book

1.   M.J. Quinn, “Designing Efficient Algorithms for Parallel Computer’, McGraw Hill, 1994.

 

COURSE OUTCOMES

Students are able to

CO1: apply the basic knowledge of partitioning and scheduling in Multiprocessors.

CO2: analyze and design cache memory, virtual memory and shared memory Organizations.

CO3: distinguish and analyze the design properties of Linear and Non - Linear processors.

CO4: analyze the principles of multithreading in hybrid Architectures.

           CO5: write any parallel programming models for various architectures and Applications