VLSIdesign automation tools- algorithms and system design. Structural and logic design. Transistor level design. Layout design. Verification methods. Design management tools.
Layout compaction, placement and routing. Design rules, symbolic layout. Applications of compaction. Formulation methods. Algorithms for constrained graph compaction. Circuit representation. Wire length estimation. Placement algorithms. Partitioning algorithms.
Floor planning and routing- floor planning concepts. Shape functions and floor planning sizing. Local routing. Area routing. Channel routing, global routing and its algorithms.
Simulation and logic synthesis- gate level and switch level modeling and simulation. Introduction to combinational logic synthesis. ROBDD principles, implementation, construction and manipulation. Two level logic synthesis.
High-level synthesis- hardware model for high level synthesis. Internal representation of input algorithms. Allocation, assignment and scheduling. Scheduling algorithms. Aspects of assignment. High level transformations.
1. S.H. Gerez, “Algorithms for VLSI Design Automation”, John Wiley ,1998.
2. N.A.Sherwani , “Algorithms for VLSI Physical Design Automation”, (3/e), Kluwer,1999.
1. S.M. Sait , H. Youssef, “VLSI Physical Design Automation”, World scientific, 1999.
2. M.Sarrafzadeh, “Introduction to VLSI Physical Design”, McGraw Hill (IE), 1996.
CO1: Students are able to know how to place the blocks and how to partition the blocks while for designing the layout for IC.
CO2: Students are able to solve the performance issues in circuit layout.
CO3: Students are able to analyze physical design problems and Employ appropriate automation algorithms for partitioning, floor planning, placement and routing
CO4: Students are able to decompose large mapping problem into pieces, including logic optimization with partitioning, placement and routing
CO5: Students are able to analyze circuits using both analytical and CAD tools
