EC653

Basics of VLSI (3 – 0 - 0) 3

COURSE OBJECTIVES

  • To provide rigorous foundation in MOS and CMOS digital circuits
  • To train the students in transistor budgets, clock speeds and the growing challenges of power consumption and productivity

 

COURSE CONTENT

Introduction to CMOS circuits: MOS transistors, CMOS combinational logic gates, multiplexers, latches and

flip-flops, CMOS fabrication and layout, VLSI design flow.

 

MOS transistor theory: Ideal I-V and C-V characteristics, non ideal I-V effects, DC transfer characteristics, Switch level RC delay models.

CMOS technologies: Layout design rules, CMOS process enhancement, Technology related CAD issues. Circuit characterization and performance estimation: Delay estimation, Logical effort and transistor sizing,

Power dissipation, Interconnect design margin, Reliability, Scaling.

 

Combinational  circuit  design:  Static  CMOS,  Ratioed  circuits,  Cascode  voltage  switch  logic,  Dynamic circuits, Pass transistor circuits.

 

Text Books

1.   N.H.E.Weste, D. Harris, “CMOS VLSI Design (3/e)”, Pearson, 2005.

2.   J.Rabey, M. Pedram,” Digital Integrated circuits (2/e)”, PHI, 2003.

 

Reference Book

1.   Pucknell & Eshraghian, “Basic VLSI Design”, (3/e), PHI, 1996.

 

COURSE OUTCOMES

Students are able to

CO1: implement the logic circuits using MOS and CMOS technology. CO2: analyse various circuit configurations and their applications

CO3: analyse the merits of circuits according to the technology and applications change.

CO4: design low power CMOS VLSI circuits.

        CO5: understand the rapid advances in CMOS Technology